1. Field of the Invention
The present invention is related to a circuit having an external test voltage, and particularly to a circuit having an external test that only has one pad for inputting an external test voltage, and outputs test voltages not varying with the external test voltage in a geometric series.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a circuit 100 having an external test voltage according to the prior art. The circuit 100 includes an amplifier 102, a P-type metal-oxide-semiconductor transistor 104, a reference switch 106, a test switch 108, a resistor RU, a resistor RD, and a plurality of series resistors R1 to Rn. When the circuit 100 operates normally, the reference switch 106 is turned on and the test switch 108 is turned off. Meanwhile, a reference voltage VREF is inputted to a negative input terminal of the amplifier 102 through the reference switch 106, and a voltage of a node A is also the reference voltage VREF. Therefore, voltages outputted by reference output terminals VINTREFN1, VINTREFN2, VINTREFN3, . . . , VINTREFNn are proportional to the reference voltage VREF. When an external test voltage VT is inputted to the circuit 100, the reference switch 106 is turned off and the test switch 108 is turned on. Meanwhile, the external test voltage VT is inputted to the negative input terminal of the amplifier 102 through the test switch 108, and a voltage of the node A is the external test voltage VT. Therefore, voltages outputted by the reference output terminals VINTREFN1, VINTREFN2, VINTREFN3 . . . , VINTREFNn are proportional to the external test voltage VT.
However, in the circuit 100, voltages outputted by the reference output terminals VINTREFN1, VINTREFN2, VINTREFN3, . . . , VINTREFNn vary with the reference voltage VREF in a geometric series. Therefore, voltages outputted by some reference output terminals may be high enough to damage tested circuits.
Please refer to FIG. 2. FIG. 2 is a diagram illustrating a circuit 200 having external test voltages according to the prior art. The circuit 200 includes an amplifier 202, a P-type metal-oxide-semiconductor transistor 204, a plurality of reference switches 2061 to 206n, a plurality of test switches 2081 to 208n, a resistor RU, a resistor RD, and a plurality of series resistors R1 to Rn. As shown in FIG. 2, the reference switch 2061 is coupled between a reference output terminal VINTREFN1 and a reference voltage output terminal VINTREF1, and the test switch 2081 is coupled between the reference voltage output terminal VINTREF1 and a test output terminal VINTREFT1. The reference switch 2062 is coupled between a reference output terminal VINTREFN2 and a reference voltage output terminal VINTREF2, and the test switch 2082 is coupled between reference voltage output terminal VINTREF2 and a test output terminal VINTREFT2, and so on.
Therefore, when each reference voltage output terminal of the reference voltage output terminals VINTREF1, VINTREF2, VINTREF3 . . . , VINTREFn needs to output an external test voltage, a corresponding reference switch is turned off and a corresponding test switch is turned on. In addition, when each reference voltage output terminal of the reference voltage output terminals VINTREF1, VINTREF2, VINTREF3 . . . , VINTREFn needs to output a reference output voltage, a corresponding reference switch is turned on and a corresponding test switch is turned off. For example, if the reference voltage output terminal VINTREF1 needs to output an external test voltage V1, the reference switch 2061 is turned off and the test switch 2081 is turned on. Therefore, the external test voltage V1 is outputted by the reference voltage output terminal VINTREF1 through the test switch 2081. Further, subsequent operational principles of the reference voltage output terminals VINTREF2 to VINTREFn are the same as those of the reference voltage output terminal VINTREF1, so further description thereof is omitted for simplicity.
Though the circuit 200 improves a disadvantage of output voltages of the reference output terminals VINTREFN1, VINTREFN2, VINTREFN3 . . . , VINTREFNn varying with the reference voltage VREF, the circuit 200 needs a plurality of pads for inputting the external test voltage during a chip test. Therefore, the circuit 200 may not be realized in a small area chip.